基于MGS-QR分解与部分和集成的FPGA矩阵求逆架构OA

Aiming at the problem that the existing FPGA matrix inversion methods are difficult to balance hardware resources,calcula-tion delay and calculation accuracy,this paper proposes a matrix inversion architecture that integrates algorithm optimization and hard-ware architecture design.In this paper,based on MGS-QR decomposition,the parallel vector operations in the operation flow are inte-grated,and the calculation of the inverse matrix is transformed into the integration of the partial sum of each iteration in the iterative process,and the vector processing unit adaptation algorithm supporting multiple vector operation modes is designed.This architecture enables N×N real matrix inversion with resource consumption scaling quadratically and clock cycles scaling linearly with the matrix size.It can therefore accommodate matrices of different sizes.Compared with the traditional MGS-QR factorization matrix inversion method,the designed architecture further reduces the amount of DSP usage and significantly lowers the calculation delay under the premise of ensuring the same calculation accuracy,which can provide an efficient and highly reliable engineering solution for real-time matrix inversion in embedded systems.