类脑计算软硬件生态的现状与展望OA
Current status and future prospects of neuromorphic computing software and hardware ecosystem
随着物联网(IoT)与边缘智能的快速发展,类脑计算凭借事件驱动、高度并行和超低功耗的特性,已成为后摩尔时代体系结构研究的核心方向.然而,通过对近10年500篇高影响力文献的系统性定量分析,发现了一个明显的结构性失衡:硬件研究占全部文献的42%以上,而连接硬件与应用的软件栈与编译工具链研究占比不足5%.这一失衡的关键原因在于类脑计算领域尚未形成统一的指令集架构(ISA)抽象,导致软硬件接口不统一、生态系统碎片化、应用规模化部署受限.为此,从算法模型到硬件集成,对完整的部署全流程进行了系统性综述,涵盖脉冲神经网络(SNN)计算模型、4类主流处理器体系结构(专用ASIC、可编程处理器、存算一体架构和异构融合处理器)、软件栈技术(编译器、编程框架和运行时环境),以及边缘视觉、机器人导航、科学计算与生物信号处理4类代表性应用领域的最新进展.核心论点是:类脑ISA是连接算法多样性与硬件执行效率的关键抽象层,也是解决当前生态僵局的逻辑起点.在此基础上,还对类脑ISA标准化与大语言模型辅助硬件设计这两大新兴趋势进行了展望,旨在为该领域从研究原型走向规模化实际部署提供系统性参考路线.
With the rapid advancement of the Internet of Things(IoT)and edge intelligence,neuro-morphic computing has become a core direction of architectural research in the post-Moore era owing to its event-driven operation,massive parallelism,and ultra-low power consumption.However,a systematic quantitative analysis of 500 high-impact publications over the past decade(2016-2026)reveals a pro-nounced structural imbalance:hardware-oriented research accounts for over 42%of the surveyed litera-ture,whereas software stack and compiler toolchain research—which bridges hardware and applications—constitutes less than 5%.This disparity is fundamentally attributable to the absence of a unified in-struction set architecture(ISA)in the neuromorphic computing domain,which results in inconsistent software-hardware interfaces,fragmented ecosystems,and constraints on the large-scale deployment of applications.To address this gap,this paper presents a comprehensive survey of the full deployment pipeline from algorithmic models to hardware integration,encompassing spiking neural network(SNN)computational models,4 mainstream processor architecture paradigms(dedicated ASIC,programmable processor,computing-in-memory architecture,and heterogeneous hybrid processor),software stack tech-nologies(compilers,programming framework,and runtime environment),as well as the latest advances in 4 representative application domains:edge vision,robotic navigation,scientific computing,and biosig-nal processing.The central thesis of this paper is that a neuromorphic ISA constitutes the critical abstraction layer connecting algorithmic diversity with hardware execution efficiency,and represents the logical starting point for resolving the current ecosystem deadlock.Building on this foundation,the paper offers a forward-looking perspective on 2 emerging trends—neuromorphic ISA standardization and LLM-aided hardware design—with the aim of providing a systematic reference roadmap for the field's transi-tion from research prototypes to large-scale practical deployment.
高滨;王蕾;魏一;杨智杰;吕雅帅;石伟;龚锐;吴华强
清华大学集成电路学院,北京 100084||启元实验室,北京 100095启元实验室,北京 100095||军事科学院国防科技创新研究院,北京 100850国防科技大学计算机学院,湖南 长沙 410073||先进微处理器芯片与系统重点实验室,湖南 长沙 410073军事科学院国防科技创新研究院,北京 100850启元实验室,北京 100095国防科技大学计算机学院,湖南 长沙 410073||先进微处理器芯片与系统重点实验室,湖南 长沙 410073国防科技大学计算机学院,湖南 长沙 410073||先进微处理器芯片与系统重点实验室,湖南 长沙 410073清华大学集成电路学院,北京 100084
信息技术与安全科学
类脑计算类脑处理器体系结构类脑指令集架构软件栈与编译工具链
neuromorphic computingneuromorphic processor architectureneuromorphic instruc-tion set architecture(ISA)software stack and compiler toolchain
《计算机工程与科学》 2026 (6)
951-970,20
国家自然科学基金(62372461,62406335)国防重点实验室项目(WDZC20235250112)
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