基于深亚微米SOI CMOS器件的极低温特性研究OA

The characteristics of SOI CMOS devices at cryogenic temperature are investigated.Wafer-level tests are conducted on 1.5 V and 5 V SOI devices with multiple feature sizes across 5 temperature points:300 K,250 K,200 K,150 K and 77 K.Experimental results indicate that as the temperature decreases from 300 K to 77 K,the threshold voltage and saturation current of devices gradually increase,while the leakage current progressively decreases.Combined with simulation data,the analysis of the experimental phenomena reveals that as the temperature decreases,on the one hand,the carrier concentration drops,causing the Fermi level to shift toward the conduction or valence band.Consequently,a higher gate voltage is required to form an effective conductive channel,leading to the increase in threshold voltage.At the same time,the reduction of carrier concentration in the subthreshold region results in the decrease in leakage current.On the other hand,the weakened thermal vibration of the crystal lattice in the semiconductor material significantly reduces the probability of lattice scattering during carrier transport.The diminished phonon scattering increases mean free path of carriers,thereby enhancing carrier mobility.This improvement in mobility strengthens the transport capability of carriers in the subthreshold region,leading to an increase in the saturation current.