一种多比特量化的高精度Sigma-Delta DAC设计OA
Design of High-Precision Sigma-Delta DAC with Multi-Bit Quantization
设计了一种多比特量化的高精度Sigma-Delta DAC.采用3阶4位量化的级联谐振分布式反馈结构(CRFB)调制器,有效降低了模拟电路的设计难度,提升了系统性能;同时采用数据加权平均算法(DWA)电路对电容失配噪声进行整形,以提高整体性能;此外,通过改进开关电容DAC的电路结构并优化传递函数,降低了对运算放大器摆率和带宽的要求.整体电路基于0.15 μmBCD工艺实现,在采样频率为10.24 MHz时,后仿真结果显示输出信号噪声失真比(SNDR)为98.2 dB,总谐波失真(THD)为-102.3 dB,具备良好的动态特性.
A high-precision Sigma-Delta DAC with multi-bit quantization is designed.A 3rd-order 4-bit quantization cascaded resonant distributed feedback(CRFB)modulator is employed to effectively reduce analog circuit design complexity and enhance system performance.Concurrently,a data weighted averaging(DWA)circuit is utilized to shape capacitance mismatch noise,thereby improving overall performance.Furthermore,by refining the circuit structure of the switched-capacitor DAC and optimizing the transfer function,the requirements for the operational amplifier slew rate and bandwidth are reduced.The entire circuit is implemented using a 0.15 μm BCD process.At a sampling frequency of 10.24 MHz,the post-simulation signal-to-noise distortion ratio(SNDR)is 98.2 dB,and the total harmonic distortion(THD)is-102.3 dB,demonstrating excellent dynamic performance.
谭琦扬;张瑛;杜建新;裴春泽
南京邮电大学电子与光学工程学院、柔性电子(未来技术)学院,南京 210023南京邮电大学集成电路科学与工程学院(产教融合学院),南京 210023南京邮电大学电子与光学工程学院、柔性电子(未来技术)学院,南京 210023南京邮电大学电子与光学工程学院、柔性电子(未来技术)学院,南京 210023
信息技术与安全科学
Sigma-Delta DAC开关电容DAC级联谐振分布式反馈数据加权平均算法
Sigma-Delta DACswitched-capacitor DACcascaded resonant distributed feedbackdata weighted averaging
《电子与封装》 2026 (6)
61-66,6
江苏省高校自然科学研究面上项目(16KJB510033)
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