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星载雷达中抗单粒子翻转的DSP加固设计OA

DSP reinforcement design for anti-single event upset in spaceborne radar

中文摘要英文摘要

针对高能带电粒子造成单粒子翻转引起星载雷达中数字信号处理器(DSP)失效的问题,从软件、硬件和系统三个维度提出了一种抗单粒子翻转的DSP加固设计方案.该方案采用关键变量三模冗余(TMR)、引导程序检验纠错方法、定时刷新控制寄存器、错误检测与纠正(EDAC)模块和"看门狗"等设计方式,保证在发生单粒子翻转时DSP系统的成功加载和正常运行.故障注入试验表明,采用该方案后,DSP全部正常加载;DSP系统在发生单粒子翻转时的恢复成功率达到99.6%,且平均故障恢复时间约为10 s.

To address the failure of digital signal processors(DSP)in spaceborne radar caused by single event upsets induced by high-energy charged particles,a DSP reinforcement design scheme against single event upsets is proposed from three dimensions:software,hardware and system.This scheme adopts design methods such as triple modular redundancy(TMR)for key program variables,bootloader verification and error correction,periodic refresh of control registers,error detection and correction(EDAC)and watchdog design,ensuring that the system can load successfully and operate normally when a single event upset occurs in the DSP.The fault injection tests demonstrate that after this scheme is adopted,the whole DSP loads successfully,and that when a single event up-set occurs,the recovery success rate of the DSP system reaches 99.6%,with the average fault recovery time being approximately 10 s.

易锋;杜春鹏;孙家敬;史鸿声

中国电子科技集团公司 第三十八研究所,合肥 230088中国电子科技集团公司 第三十八研究所,合肥 230088中国电子科技集团公司 第三十八研究所,合肥 230088中国电子科技集团公司 第三十八研究所,合肥 230088

信息技术与安全科学

星载雷达数字信号处理器现场可编程门阵列单粒子翻转加固设计

spaceborne radardigital signal processorfield programmable gate array(FPGA)single event upsetreinforcement design

《空天预警研究学报》 2026 (3)

182-185,4

10.3969/j.issn.2097-180X.2026.03.006

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