一种低硬件开销的Sigma-Delta DAC数字前端设计OA
Design and Implementation of A Digital Frontend for Sigma-Delta DAC with Low Hardware Overhead
针对消费市场对高精度低资源消耗的DAC(Digital to Analog Converter)需求,文中设计了一种低硬件开销的Sigma-Delta DAC数字前端电路,在保持高性能的同时使硬件资源的使用最小化.数字前端通过采用复用优化的升采样滤波器设计和高效调制方案降低了硬件复杂度和功耗.通过仿真实验进行数据验证,并在FPGA(Field Programmable Gate Array)开发板进行验证和数据分析.实验结果表明,Sigma-Delta DAC数字前端设计在满足高精度需求的同时减少了电路的硬件开销.
In view of the demand of the consumer market for DAC(Digital to Analog Converter)with high pre-cision and low resource consumption,a Sigma-Delta DAC digital front-end circuit with low hardware overhead is de-signed to minimize the use of hardware resources while maintaining high performance.The digital front end reduces hardware complexity and power consumption by adopting a multiplexed optimized upsampling filter design and an effi-cient modulation scheme.Data verification is carried out through simulation experiments,and verification and data a-nalysis are conducted on the FPGA(Field Programmable Gate Array)development board.The experimental results show that the Sigma-Delta DAC digital front-end design reduces the hardware overhead of the circuit while meeting the high-precision requirements.
钟晟;王法翔
福州大学 物理与信息工程学院,福建 福州 350108福州大学 物理与信息工程学院,福建 福州 350108
信息技术与安全科学
Sigma-Delta DAC高精度低硬件开销复用优化升采样滤波器调制器DWAFPGA
Sigma-Delta DAChigh-precisionlow-resource consumptionmultiplexer-optimizedupsampling filtermodulatorDWAFPGA
《电子科技》 2026 (6)
73-79,7
福建省自然科学基金(2021J01585)Natural Science Foundation of Fujian(2021J01585)
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