基于ADS-B技术的低空监视设备的硬件设计OA

Addressing the complex surveillance demands arising from the development of the low-altitude economy and the limitations of traditional radar in detecting Low-altitude,Slow-speed,and Small-size(LSS)targets,this paper designs and implements a high-performance ADS-B receiver hardware for low-altitude surveillance applications.The proposed scheme adopts a heterogeneous architecture integrating a high-performance Radio Frequency(RF)front-end with coordinated FPGA and MCU processing.The RF front-end utilizes an asymmetric coupler dual-path logarithmic detection scheme to effectively extend the system's dynamic range.The digital backend leverages the FPGA for real-time physical layer demodulation and decoding of ADS-B signals,while the MCU is responsible for application-layer message parsing,protocol encapsulation,and data output.To validate the effectiveness of the scheme,a prototype is developed and subjected to performance testing.The test results demonstrate that the receiver achieves a measured sensitivity better than-94 dBm and an effective dynamic range of approximately 77 dB,meeting the design specifications.This hardware solution exhibits excellent performance,stability,and reliability,providing a feasible hardware foundation for constructing wide-area,cost-effective low-altitude surveillance networks.