基于源极退化电阻的高电源抑制比带隙基准设计OA

In order to improve the power supply rejection ratio(PSRR)of bandgap reference(BGR)at low supply voltage,a novel bandgap reference structure was proposed.PSRR was improved by reducing mismatch and increasing the gain of operational amplifier.Conventional current-mode BGR introduce mismatch when using MOSFET to replicate current,resulting in a degradation of PSRR.To address this issue,resistor and MOSFET with source degradation resistor were used to replicate current.A high gain chopper amplifier was designed to reduce the offset voltage and noise.In addition,a two-stage curvature compensation structure was designed to reduce the temperature coefficient(TC).This bandgap reference was designed by TSMC 65 nm mixed signal CMOS technology.3 sigma Monte Carlo simulation was performed at a supply voltage of 1.2 V.Simulation results show that this BGR achieves a average PSRR of-81.4 dB at DC and-48.9 dB at 10 kHz.The TC of the BGR is 1.62× 10-6/℃ from-40 ℃ to 125 ℃.The integrated noise from 0.1 Hz to 10 Hz is 15.5 μV.