基于电源平面波动的SoC行为的数模协同分析OA

For debug and verification of SoC,power source related problem is commonly encountered.The existence of inner resistor of power source,path of layout,and chip package,are the factor of output voltage fluctuation accompanied with load changes.In the de-sign of SoC,some circuit and modules are designed for debug,beside design for test.OSC(oscilloscope)is typical measure tool for ana-log circuit test,which is widely used for observing voltage variation over time.LA(logic analyzer)is typical measure tool for digital cir-cuit test,which is used for observing digital circuit timing,logic,and data on bus.When LA is observing debug port which output sys-tem status,result can be combined with the signal that observed from OSC,which would be helpful for positioning and solving prob-lem.For example,in the system with low voltage and high current,power saving can be realized by lowering voltage efficiently.Mini-mal effective operating voltage is affected by power source fluctuation.Analog and digital test combination will be helpful for analyzing the reason of fluctuation,optimize power fluctuation and improve the system performance.