一种数字波束合成芯片的FPGA验证系统搭建OA
Construction of an FPGA Verification System for Digital Beamforming Chip
数字波束合成(DBF)芯片是一种复杂的专用集成电路(ASIC)芯片,其流片前的验证工作对提高芯片成功率至关重要.提出了一种基于可编程门阵列(FPGA)的原型验证系统搭建方法,采用思尔芯科技的QuadVU验证板和树莓派开发板,模拟芯片流片后的应用场景.通过合理裁剪芯片设计代码,替换FPGA不可编译的模块,并重新设计时钟架构,实现了数字波束合成芯片在FPGA上的功能验证.实验结果表明,该系统能够有效验证芯片的数据处理流程和多片级联功能,为芯片回片测试奠定了坚实基础.
The digital beamforming(DBF)chip is a kind of complex application-specific integrated circuit(ASIC)chip,and its verification work before tape-out is crucial to improve the success rate of the chip.A field programmable gate array(FPGA)-based prototyping verification system construction method is proposed.The Quad VU verification board from S2C Technology and a Raspberry Pi development board are employed to simulate the application scenario after tape-out.By reasonably trimming the chip design code,replacing the non-compilable modules for the FPGA,and redesigning the clock architecture,the functional verification of the DBF chip on the FPGA is realized.The experimental results show that the system can effectively verify the data processing flow and multi-chip cascade function of the chip,which lays a solid foundation for chip post-silicon test.
杨业;符青;曹靖;王志龙;胡兵;汤涛
江苏华创微系统有限公司,南京 210000江苏华创微系统有限公司,南京 210000江苏华创微系统有限公司,南京 210000江苏华创微系统有限公司,南京 210000江苏华创微系统有限公司,南京 210000江苏华创微系统有限公司,南京 210000
信息技术与安全科学
数字波束合成FPGA验证原型树莓派多片级联
digital beamformingFPGA verificationprototypingRaspberry Pimulti-chip cascade
《电子与封装》 2026 (3)
115-121,7
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