薄层SOI结构电容-电压表征技术OA

As transistor dimensions continue to scale down,reducing the thickness of the active layer become increasingly critical,posing new challenges for extracting physical parameters using capacitance-voltage(C-V)methods.This paper proposes a non-destructive C-V characterization method for thin Silicon-on-insulator(TSOI)structures,using a series-connected virtual metal-oxide-semiconductor(MOS)structure.This approach begins by introducing a series method with virtual MOS structures to convert the C-V modeling of the TSOI structure into the modeling of two back-to-back virtual MOS structures.Subsequently,low-frequency and high-frequency C-V models are developed for both ideal and practical TSOI,based on the relationships among the silicon film thickness,depletion region width,Debye length,and inversion layer thickness.Numerical simulations performed with semiconductor device simulation software Synopsys TCAD validate the correctness and effectiveness of the proposed model.