首页|期刊导航|集成电路与嵌入式系统|基于FPGA的万兆以太网在雷达数字前端设计中的实现

基于FPGA的万兆以太网在雷达数字前端设计中的实现OA

Implementation of 10-Gigabit ethernet based on FPGA in radar digital front-end design

中文摘要英文摘要

介绍了基于Xilinx公司FPGA的高速实时信号处理雷达数字前端设计.雷达前端的FPGA充分利用其丰富的逻辑、RAM、DSP及高速接口等资源,实现万兆以太网、Microblaze和高速缓存等功能模块,使得该FPGA具有控制、预处理及高速数据传输功能,进而使得雷达处理前端具有硬件结构简洁、信号处理能力强、数据传输速度快等特点.在软件实现中,根据雷达波形特点精心设计高速数据读/写时序,使其数据传输能力满足设计要求.本设计在监视雷达项目中得到了成功应用,并取得了良好的效果.

This paper presents the design of a high-speed real-time signal processing radar digital front-end based on Xilinx FPGA.The FPGA in this radar front-end fully utilizes its abundant resources,including logic,RAM,DSP,and high-speed interfaces,to implement functional modules such as 10-Gigabit Ethernet,Microblaze,and high-speed cache.This enables the FPGA to perform control,prepro-cessing,and high-speed data transmission,resulting in a radar processing front-end with a simple hardware structure,high signal pro-cessing capability,and fast data transmission speed.To meet the data transmission capacity requirements,in the software implementa-tion,the high-speed data read-write timing is meticulously designed according to radar waveform characteristics.This design has been successfully applied in real-time processing for surveillance radar projects,achieving excellent results.

唐浩

成都天奥信息科技有限公司,成都 610041

信息技术与安全科学

FPGA雷达MTUUDP万兆以太网MicroblazeSFDR

FPGARadarMTUUDP10-Gigabit EthernetMicroblazeSFDR

《集成电路与嵌入式系统》 2026 (4)

76-83,8

10.20193/j.ices2097-4191.2025.0143

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