基于多指交叉结构与SMBO协同优化的低寄生电容SCR保护器件设计OA

A unique low-parasitic-capacitance thyristor device was developed to solve the problem of balancing high resilience and low parasitic capacitance in thyristor output stages for relay protection.In order to improve heat dissipation and current distribution uniformity,this device used a shared cathode/anode arrangement with a multi-finger cross-bar to lower junction capacitance series impedance.Parasitic capacitance,trigger voltage,holding voltage,on-resistance,and thermal resistance were the main objectives of multi-objective adaptive collaborative optimization,which was accomplished by combining gradient-boosted decision tree algorithms,multiphysics coupling modeling,and sequence model optimization.The device has a holding voltage between 4.0 V and 5.0 V,on-resistance between 1.8 mΩ·mm2 and 3.2 mΩ·mm2,and thermal resistance between 30 K/W and 45 K/W;simulations show that it has balanced static properties.The device outperforms traditional structures in real-world applications with temperature adaptability from-55℃to 175℃,a signal distortion rate from 0.8%to 1.8%,a false trip rate from 0.05%to 0.18%,a transient reaction time of 1.6 ns,and an average clamping voltage of 5.4 V.A device-level solution for high-frequency,high-sensitivity relay protection systems is provided by resolving the contradiction between low-capacitance triggering and high reliability through synergistic optimization of the cross-structure and machine learning.