一种DS型功率半导体模块的低应力弹性压接封装模型与模拟OA
A Low-stress Elastic Press-pack Model and Simulation for DS Type Power Semiconductor Modules
提出一种新型DS型压接模块封装的电极技术,兼具导电、导热、弹性与低电感相统一的特征,即兼具碟簧组件的弹性,又具有凸台式刚性电极的导电、导热和低感为一体的优点.基于该DS型新型电极,设计一种低应力弹性压接封装功率模块的基本结构形式、仿真模型、制造工艺及材料选用;介绍基于4 500V硅基绝缘栅双极晶体管(insulated gate bipolar transistor,IGBT)和快恢复二极管(fast recovery diode,FRD)芯片设计的新型单芯片组件的模型与多物理场模拟、制造工艺、模块的耐压装能力和静态等性能测试.测试结果表明,基于DS型弹性电极的单芯片模块具有良好的压装综合性能,可为后续4 500 V/3 000 A及以上功率级别模块的封装设计提供基础电极模型.
This article proposes a new electrode technology for reversed S(DS)type press packing module,which integrates electrical and thermal conductivity,elasticity,and low inductance.It combines the elasticity of disc spring components with the electrical conductivity,thermal conductivity,and low inductance of convex rigid electrodes.Based on the new DS type electrode,a basic structural form,simulation model,manufacturing process,and material selection of a low-stress elastic press-pack power module are designed.A detailed introduction is given to the model and the multi-physics simulation,manufacturing process,voltage resistance and static performance testing of a new single-chip module designed based on 4500V silicon-based IGBT and fast recovery diode(FRD)chips.Preliminary test results show that the single-chip module based on DS type elastic electrodes has good comprehensive press-pack performance and can provide a basic electrode model for the packaging design of 4500V/3000A and higher rated modules in the future.
李现兵;韩佳桐;姚鹏;岳瑞峰;王燕;赵艳鹏;吴鹏飞;孙帅;杨霏
清华大学集成电路学院,北京市海淀区 100084清华大学集成电路学院,北京市海淀区 100084清华大学集成电路学院,北京市海淀区 100084清华大学集成电路学院,北京市海淀区 100084清华大学集成电路学院,北京市海淀区 100084北京博电新力电气股份有限公司,北京市大兴区 100176中国电力科学研究院有限公司,北京市海淀区 100192中国电力科学研究院有限公司,北京市海淀区 100192中国电力科学研究院有限公司,北京市海淀区 100192
信息技术与安全科学
功率半导体模块低应力弹性压接模型模拟
power semiconductormodulelow stresselastic press packmodelsimulation
《中国电机工程学报》 2026 (2)
744-755,中插25,13
北京市科委重点支持项目(Z201100004020002).Beijing Municipal Science & Technology Commission Important Research Program(Z201100004020002).
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