基于双输出C单元的抗三节点翻转锁存器设计OA
Design of a Triple-Node Upset Tolerant Latch Based on Dual-output C-elements
随着CMOS技术发展推动晶体管尺寸的缩小,由辐射引起的CMOS电路三节点翻转(Triple-Node Upset,TNU)已成为威胁存储器件可靠性的一个重要问题.为了缓解软错误对集成电路的影响,文章提出了一种能够容忍三节点翻转(TNUs)的低开销锁存器设计(LCDOCTL).LCDOCTL锁存器主要由一个存储模块与一个拦截模块组成,并利用单元间的数据反馈有效实现TNU的容忍.HSPICE仿真结果表明,所提出的LCDOCTL锁存器与现存的三节点翻转容忍锁存器设计相比,平均可节省5.1%的面积、70.31%的传输延迟、44.12%的功耗以及84.66%的PDP.
With the development of CMOS technology driving the scaling down of transistor dimensions,radiation-induced Triple-Node Upset(TNU)in CMOS circuits have become a critical issue threatening the reliability of memory devices.To mitigate the impact of soft errors on integrated circuits,this paper proposes a low-overhead latch design capable of tolerating Triple-Node Upsets(LCDOCTL).The LCDOCTL latch mainly consists of a storage module and an interception module,and achieves effective TNU tolerance by utilizing inter-cell data feedback.HSPICE simulation results show that,in comparison with existing TNU-tolerant latch designs,the proposed LCDOCTL latch achieves an average saving of 5.1%in area,70.31%in propagation delay,44.12%in power consumption and 84.66%in Power-Delay Product(PDP).
唐叶
安徽理工大学 计算机科学与工程学院,安徽 淮南 232001
信息技术与安全科学
辐射软错误锁存器三节点翻转(TNU)容忍
radiationsoft errorlatchTNUtolerance
《现代信息科技》 2026 (4)
13-16,23,5
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