搭载卷积神经网络加速模块的微处理器设计OA
Design of Microprocessor with Convolutional Neural Network Acceleration Module
当前人工智能技术迅速发展,针对轻量化边缘侧AI计算的需求日益增长.文章提出一种基于ARM与FPGA协同的卷积神经网络(CNN)推理硬件加速方案.首先,在主机端使用PyTorch完成模型训练与量化,获得权重与偏置参数;随后在FPGA上并行实现卷积、池化及全连接运算,并通过AHB总线与CPU交互.最后,在PZ7020 开发板上进行测试,实验结果表明,该处理器能够对输入图像进行准确识别与分析.该方案为资源受限场景下的边缘侧AI推理提供了高效可行的技术路径.
With the rapid development of current artificial intelligence technology,the demand for lightweight edge-side AI computing increases day by day.This paper proposes a Convolutional Neural Network(CNN)inference hardware acceleration scheme based on the collaboration between ARM and FPGA.Firstly,the scheme uses PyTorch on the host side to complete model training and quantization,and obtains weight and bias parameters.Secondly,it implements convolution,pooling,and fully connected operations in parallel on the FPGA,and interacts with the CPU through the AHB bus.Finally,tests are conducted on the PZ7020 development board.Experimental results show that the processor can accurately identify and analyze input images.This scheme provides an efficient and feasible technical path for edge-side AI inference in resource-constrained scenarios.
黄彦涵
南京邮电大学,江苏 南京 210046
信息技术与安全科学
PyTorchCNNFPGA微处理器
PyTorchCNNFPGAmicroprocessor
《现代信息科技》 2026 (1)
17-21,5
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